Ta based au-free ohmic contacts in advanced aigan/gan based hfets and/or moshfets for power switch applications

ABSTRACT

A method of forming an Ohmic contact including forming a Ta layer in a contact area of a barrier layer by evaporation at an evaporation rate of 1 Å/second, forming a Ti layer on the first Ta layer, and forming an Al layer on the Ti layer, wherein the barrier layer comprises AlGaN having a 25% Al composition and a thickness in a range between 30 Å to 100 Å, and wherein the barrier layer is on a channel layer comprising GaN.

STATEMENT REGARDING FEDERAL FUNDING

None

TECHNICAL FIELD

This disclosure relates to Ohmic contacts and in particular to Ohmiccontacts for power switch applications.

BACKGROUND

Au-free Ohmic contacts for AlGaN/GaN based HFETs have advantages overconventional Ohmic contacts. Conventional Ohmic contacts in AlGaN/GaNbased HFETs use titanium (Ti) and aluminum (Al), along with cap layersincluding gold (Au) on top and a barrier layer such as Ni, Ti or Ptunder. Cap layers with Au are supposed to reduce contact resistance, butthe role of top layers, particularly Au, is not well understood, asreported by A. N. Bright et al “Correlation of contact resistance withmicrostructure for Au/Ni/Al/Ti/AlGaN/GaN ohmic contacts usingtransmission electron microscopy” in Journal of Applied Physics, Vol.89, No. 6, page 3143-3150.

Typical annealing temperatures for conventional Ohmic contacts are quitehigh, and the surface morphology is not smooth. Even with a barrierlayer underneath, Au spikes may still punch through the metal stackunderneath and may reach the metal/semiconductor interface, whichresults in low reliability. Such has been observed, as reported by A. N.Bright et al., “Correlation of contact resistance with microstructurefor Au/Ni/Al/Ti/AlGaN/GaN ohmic contacts using transmission electronmicroscopy” in Journal of Applied Physics, Vol. 89, No. 6, page3143-3150.

Au-free Ohmic contacts for AlGaN/GaN based HFETs and/or MISHEMTs on Sisubstrates have been described. For example, Hiroshi Kambayashi et al.describe “Improving the Performance of GaN Power Devices for HighBreakdown Voltage and High Temperature Operation” in Furukawa Review No.29, 2006, page 7-12; and B. De Jaeger et al. describe “Au-freeCMOS-compatible AlGaN/GaN HEMT processing on 200 mm Si substrates”, inProceeding of the 2012 24^(th) ISPSD page 49-52”. These two publicationsreport Ohmic layers that are Ti/AlSi/Mo and Ti/Al/Ti/TiN, respectively.

D. Qiao et al. describe “Ta-based interface Ohmic contacts to AlGaN/GaNheterostructures” in Journal of Applied Physics, Vol. 89, No. 10, page5543-5546, 2001; however the annealing temperature required is quitehigh with a rapid thermal annealing (RTA) temperature of 950° C. for 4minutes. Extreme high annealing temperature may either destroyheterostructures or require a complicated cap layer during annealing.

“Tantalum-based ohmic contacts for nitride semiconductor transistors” inSemiconductor Today Compounds & Advanced Silicon Vol.6 Issue 3 April/May2011 describes using a lower temperature than the Al melting temperatureof 660° C. for annealing; however, obtaining acceptable results usingthe described technique may be challenging to repeat and it may bedifficult to obtain an Rc lower than 1Ω/mm.

S. H. Lim et al. in “Microstructural evidence on electrical propertiesof Ta/Ti/Al and Ti/Ta/Al Ohmic contacts to n-AlGaN/GaN” Applied PhysicsLetters Vol. 78, No. 24, page 3797-3799 show the advantages of having Taat the bottom as compared with having Ti at the bottom of an Ohmiccontact layer. They describe a thicker TaN layer formed at themetal/semiconductor interface with Ta at bottom, as compared to thethickness of a TiN layer formed at the same interface with Ti at bottomof Ohmic layer stack. The specific contact resistivity of Ta/Ti/Al isorders of magnitude lower than that of Ti/Ta/Al.

What is needed is an improved Ohmic contact, especially for powerswitching applications, which use large devices with high breakdownvoltage and long term reliability requirements. Low Ohmic contactresistance is also desired. The embodiments of the present disclosureanswer these and other needs.

SUMMARY

In a first embodiment disclosed herein, a method of forming an Ohmiccontact comprises forming a Ta layer in a contact area of a barrierlayer by evaporation at an evaporation rate of 1 Å/second, forming a Tilayer on the first Ta layer, forming an Al layer on the Ti layer,wherein the barrier layer comprises AlGaN having a 25% Al compositionand a thickness in a range between 30 Å to 100 Å, wherein the barrierlayer is on a channel layer comprising GaN.

In another embodiment disclosed herein, a method of forming an Ohmiccontact for a field effect transistor comprises a Ta layer in a contactarea of a barrier layer formed by evaporation at an evaporation rate of1 Å/second, a Ti layer on the first Ta layer, and an Al layer on the Tilayer, wherein the barrier layer comprises AlGaN having a 25% Alcomposition and a thickness in a range between 30 Å to 100 Å, andwherein the barrier layer is on a channel layer comprising GaN.

These and other features and advantages will become further apparentfrom the detailed description and accompanying FIG.s that follow. In theFIG.s and description, numerals indicate the various features, likenumerals referring to like features throughout both the drawings and thedescription.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a starting vertical layer structure, with photo resist fordevice isolation in accordance with the prior art;

FIG. 2 shows the vertical layer structure after passivation layeretching for device isolation in accordance with the prior art;

FIG. 3 shows implanting ions for device isolation in accordance with theprior art;

FIG. 4 shows the vertical layer structure after photo-resist removal inaccordance with the prior art;

FIG. 5 shows the vertical layer structure after Ohmic level lithographywith the Ohmic contact area opened in accordance with the presentdisclosure;

FIG. 6 shows the vertical layer structure after removing the passivationlayer in the Ohmic contact area in accordance with the presentdisclosure;

FIG. 7 shows the vertical layer structure after ohmic metal evaporationin accordance with the present disclosure;

FIGS. 8A and 8B show layers of an Ohmic contact in accordance with thepresent disclosure;

FIG. 9 shows the vertical layer structure after overlay metal depositionin accordance with the present disclosure;

FIG. 10A shows Rsh and FIG. 10B shows Rt from transmission linemeasurements (TLMs) made in lots HV07L22 and HV07L24 in accordance withthe present disclosure;

FIG. 11A shows Rc and FIG. 11B shows the transfer length (Lt) from TLMmeasurements made in lots HV07L22 and HV07L24 in accordance with thepresent disclosure; and

FIG. 12 shows a smooth surface morphology for Ohmic contacts in a teststructure TLM in accordance with the present disclosure.

DETAILED DESCRIPTION

In the following description, numerous specific details are set forth toclearly describe various specific embodiments disclosed herein. Oneskilled in the art, however, will understand that the presently claimedpresent disclosure may be practiced without all of the specific detailsdiscussed below. In other instances, well known features have not beendescribed so as not to obscure the present disclosure.

Ta based Au-free Ohmic contacts are described herein for advancedAlGaN/GaN based HFETs and/or MOSHFETs on Si substrates for high powerswitch applications and other applications. The Ohmic contact metalstack of the present disclosure has a metal stack of Ta, Ta, Ti and Alwith 200 Å, 200 Å, 500 Å, and 500 Å thicknesses, respectively. Ta is onthe bottom of the metal stack in contact with the semiconductor. Themetal stack may be deposited by e-beam evaporations at a rate of Ta 1Å/sec with the system cooled down to 30° C. after each Ta layer isformed. The metal stack is annealed using rapid thermal annealing (RTA)at a temperature ranging from 750° C.-850° C., for 10 sec-60 sec. TheRTA time may typically be 30 sec. The annealing temperature in thisdisclosure is significantly lower than the temperature used for theTa-based Ohmic contacts described by D. Qiao et al in “Ta-basedinterface Ohmic contacts to AlGaN/GaN heterostructures” Journal ofApplied Physics, Vol. 89, No. 10, page 5543-5546, which require an RTAtemperature of 950° C. for 4 minutes. Ohmic contacts according to thepresent disclosure can provide a contact resistance of less than orequal to 0.5Ω/mm.

The epi-structure upon which the Ohmic contact is used may contain anAlGaN barrier layer with 25% of Al and a thickness in the range of 30 Åto 100 Å. A spacer layer of AlN with a thickness of 10 Å may be underthe barrier layer of AlGaN, and a GaN layer may be below the spacerlayer. Preferably Si₃N₄ is used as a surface passivation layer, and theSi3N4 passivation layer may be deposited on top of epi-layers beforedevice processing, for example by MOCVD; however, other passivationmaterials may be used. Alternatively, the Si3N4 passivation layer may bedeposited after Ohmic contact processing, for example by plasma-enhancedchemical vapor deposition (PECVD), or both before and after Ohmiccontact formation, depending on device design. Thickness of the Si3N4passivation layer may be 20 nm or thicker.

The Ta based Au-free Ohmic contacts of this disclosure provide a smoothsurface morphology with well-defined peripheries to obtain a low contactresistance Rc. Low-resistance contacts are needed for high breakdownvoltage devices to reduce losses and self-heating for power switchapplications. The smooth surface morphology and well defined featureperipheries also enhance long term performance and reliability.

The Ta/Ta/Ti/Al Ohmic metal stack may formed by photo lithography,evaporation and liftoff or by sputtering and dry etching, both of whichare standard processing techniques for refractory metal contacts. TheOhmic contacts of the present disclosure have the advantage of a metalstack that is compatible with, and hence can be implemented into, lowcost Si-CMOS processing technologies. The low contact resistance of0.5Ω/mm or less that can be obtained for advanced AlGaN/GaN based HFETsand/or MQSHFETs on Si substrates is well suited for applications in highpower switches.

FIGS. 1-9 show an example of a process for forming Ta based Au-freeOhmic contacts. FIG. 1 shows an example schematic of a starting verticallayer structure of a HFET device with a Si substrate 10, AlGaN and GaNHFET layers 12, and a Si₃N₄ passivation layer 14, which may be depositedby metal organic chemical vapor deposition (MOCVD). Si₃N₄ is preferredfor the passivation layer 14, because it has properties that canwithstand rapid thermal annealing (RTA). The AlGaN barrier layer may be25% Al, be undoped and have a 30-100 Å thickness. The GaN channel layermay have a 1 μm thickness. A photo resist layer 16 is deposited andpatterned for device isolation.

FIG. 2 shows the vertical structure of the device after etching theSi₃N₄ passivation layer 14 to define a device, and FIG. 3 shows ions 18being implanted outside the Si₃N₄ passivation layer 14 for deviceisolation. FIG. 4 shows the vertical structure after removal of thephoto-resist layer 16.

Then as shown in FIG. 5, photo-resist 20 is deposited and patternedusing lithography so that the Ohmic contact areas 22 are open.

Then as shown in FIG. 6 the Si₃N₄ passivation layer is removed in theOhmic contact areas 22 by etching. If a gate dielectric layer isdeposited prior to the Ohmic contact formation process, and/or a recessis required for the AlGaN barrier layer, depending on thickness ofAlGaN, these layers may also be removed at this step before Ohmic metaldepositions.

FIG. 7 shows the vertical structure after Ohmic contacts are formed forthe source contact 24 and the drain contact 26 of, for example, an HFET.The layers of the Ohmic contacts, as shown in FIG. 8A, may be thefollowing: a first Ta layer 30 200 Å thick on the AlGaN barrier layer 13over the GaN channel layer 9, a second Ta layer 32 200 Å thick on thefirst Ta layer 30, a Ti layer 34 500 Å thick on the second Ta layer 32,and an Al layer 36 500 Å thick on the Ti layer 34. The Ta layer 30 maybe deposited with a Ta evaporation rate of 1 Å/sec. After the Ta layer30 evaporation process, the system and the Ta layer 30 may be cooleddown to 30° C. The Ta layer 32 may also be deposited with a Taevaporation rate of 1 Å/sec, and after the evaporation process, thesystem and the Ta layer 32 may be cooled down to 30° C. The AlGaNbarrier layer 13 preferably has a 25% Al composition and a thickness ina range between 30 Å to 100 Å. A AlN spacer layer 11 having a thicknessof 10 Å may be between the barrier layer 13 and the channel layer 9.

Rather than depositing by evaporation the first Ta layer 30 to be 200 Åthick on the AlGaN barrier layer 13, and then depositing a second Talayer 32 200 Å thick on the first Ta layer 30, the first Ta layer 30 maybe deposited by evaporation to be 400 Å thick on the AlGaN barrier layer13, and then the 500 Å thick Ti layer 34 is deposited on the first Talayer 30, and the 500 Å thick Al layer 36 is deposited on the Ti layer34, as shown in FIG. 8B. In this embodiment the cooling steps betweendepositions may be used or eliminated.

After Ohmic metal evaporation, RTA (rapid thermal annealing) isperformed with a temperature range for 750° C.-850° C., for 10 sec to 60sec. Typically the RTA time may be 30 sec.

FIG. 9 shows the vertical structure after overlay metal 40 is depositedon the Ohmic contact 24 or 26.

FIG. 10A and 10B show the results from transmission line measurements(TLMs). TLM is a technique used in semiconductor physics and engineeringto determine the contact resistance between a metal and a semiconductor.FIG. 10A and 10B show the Rsh and Rt TLM results from lot HV07L22 with40 Å of AlGaN in wafer GA591C using an RTA at 800° C. for 30 seconds;and lot HV07L24 with 50 Å of AlGaN in wafer GA602A using an RTA at 800°C. for 15 seconds, and for wafer GA602B using an RTA at 800° C. for 30seconds. FIG. 11 shows TLM measurements of contact resistance Rc andtransfer length Lt for HV07L22 and HV07L24.

FIG. 12 shows an example of a test structure TLM fabricated according tothe present disclosure on wafer GA591C of lot HV07L22 that has a smoothsurface morphology for the Ohmic contacts.

Having now described the present disclosure in accordance with therequirements of the patent statutes, those skilled in this art willunderstand how to make changes and modifications to the presentinvention to meet their specific requirements or conditions. Suchchanges and modifications may be made without departing from the scopeand spirit of the present disclosure as disclosed herein.

The foregoing Detailed Description of exemplary and preferredembodiments is presented for purposes of illustration and disclosure inaccordance with the requirements of the law. It is not intended to beexhaustive nor to limit the present disclosure to the precise form(s)described, but only to enable others skilled in the art to understandhow the present disclosure may be suited for a particular use orimplementation. The possibility of modifications and variations will beapparent to practitioners skilled in the art. No limitation is intendedby the description of exemplary embodiments which may have includedtolerances, feature dimensions, specific operating conditions,engineering specifications, or the like, and which may vary betweenimplementations or with changes to the state of the art, and nolimitation should be implied therefrom. Applicant has made thisdisclosure with respect to the current state of the art, but alsocontemplates advancements and that adaptations in the future may takeinto consideration of those advancements, namely in accordance with thethen current state of the art. It is intended that the scope of thepresent disclosure be defined by the Claims as written and equivalentsas applicable. Reference to a claim element in the singular is notintended to mean “one and only one” unless explicitly so stated.Moreover, no element, component, nor method or process step in thisdisclosure is intended to be dedicated to the public regardless ofwhether the element, component, or step is explicitly recited in theClaims. No claim element herein is to be construed under the provisionsof 35 U.S.C. Sec. 112, sixth paragraph, unless the element is expresslyrecited using the phrase “means for . . . ” and no method or processstep herein is to be construed under those provisions unless the step,or steps, are expressly recited using the phrase “comprising the step(s)of . . . .”

What is claimed is:
 1. A method of forming an Ohmic contact for a fieldeffect transistor comprising: forming a Ta layer in a contact area of abarrier layer by evaporation at an evaporation rate of 1 Å/second;forming a Ti layer on the first Ta layer; and forming an Al layer on theTi layer; wherein the barrier layer comprises AlGaN having a 25% Alcomposition and a thickness in a range between 30 Å to 100 Å; andwherein the barrier layer is on a channel layer comprising GaN.
 2. Themethod of claim 1 wherein: the Ta layer is 400 Å thick; the Ti layer is500 Å thick; and the Al layer is 500 Å thick.
 3. The method of claim 1further comprising: cooling the Ta layer after evaporation to 30° C. orless.
 4. The method of claim 1 further comprising: rapid thermalannealing at a temperature range of 750° C. to 850° C. for 10 sec to 60sec.
 5. The method of claim 1 further comprising: forming the GaNchannel layer on a substrate, the channel layer having about a 1 μmthickness; and forming an AlN spacer layer having a thickness of 10 Å onthe channel layer and between the channel layer and the barrier layer.6. The method of claim 1 wherein the Ohmic contact has a contactresistance of less than or equal to 0.5Ω/mm.
 7. The method of claim 1wherein the Ta layer, the Ti layer, and the Al layer are formed by photolithography, evaporation and liftoff or by sputtering and dry etching.8. The method of claim 1 further comprising: forming a passivation layerover the barrier layer using metal organic chemical vapor depositionbefore forming an Ohmic contact, and then using photo resist andlithography to define at least one contact area; and removing thepassivation layer in the contact area by etching the passivation layer.9. The method of claim 8 wherein the passivation layer comprises Si₃N₄.10. The method of claim 1 further comprising: forming a passivationlayer over the barrier layer using plasma-enhanced chemical vapordeposition (PECVD) after forming the Ohmic contact.
 11. The method ofclaim 10 wherein the passivation layer comprises Si₃N₄.
 12. The methodof claim 1 wherein forming the Ta layer comprises: forming a first 200 Åthick Ta layer in the contact area by evaporation at an evaporation rateof 1 Å/second; cooling the first Ta layer after evaporation to 30° C. orless; and forming a second 200 Å thick Ta layer on the first Ta layer byevaporation at an evaporation rate of 1 Å/second; cooling the second Talayer after evaporation to 30° C. or less; forming the Ti layer on thesecond Ta layer; and forming the Al layer on the Ti layer.
 13. An Ohmiccontact for a field effect transistor comprising: a Ta layer in acontact area of a barrier layer formed by evaporation at an evaporationrate of 1 Å/second; a Ti layer on the first Ta layer; and an Al layer onthe Ti layer; wherein the barrier layer comprises AlGaN having a 25% Alcomposition and a thickness in a range between 30 Å to 100 Å; andwherein the barrier layer is on a channel layer comprising GaN.
 14. TheOhmic contact of claim 13 wherein: the Ta layer is 400 Å thick; the Tilayer is 500 Å thick; and the Al layer is 500 Å thick.
 15. The Ohmiccontact of claim 13 further comprising: the GaN channel layer on asubstrate, the channel layer having about a 1 μm thickness; and an AlNspacer layer having a thickness of 10 Å on the channel layer and betweenthe channel layer and the barrier layer.
 16. The Ohmic contact of claim13 wherein the Ohmic contact has a contact resistance of less than orequal to 0.5Ω/mm.
 17. The Ohmic contact of claim 13 further comprising:a passivation layer over the barrier layer between a source contact anda drain contact.
 18. The Ohmic contact of claim 8 wherein thepassivation layer comprises Si₃N₄.
 19. The Ohmic contact of claim 1wherein the Ta layer comprises: a first 200 Å thick Ta layer in thecontact area formed by evaporation at an evaporation rate of 1 Å/second,and cooling after evaporation to 30° C. or less; and a second 200 Åthick Ta layer on the first Ta layer formed by evaporation at anevaporation rate of 1 Å/second, and cooling the second Ta layer afterevaporation to 30° C. or less; the Ti layer on the second Ta layer; andthe Al layer on the Ti layer.